Renesas Electronics FIFO Memory, 28-Pin PDIP, 7201LA12TPG
- RS Stock No.:
- 262-8979P
- Mfr. Part No.:
- 7201LA12TPG
- Brand:
- Renesas Electronics
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Subtotal 5 units (supplied in a tube)*
£51.30
(exc. VAT)
£61.55
(inc. VAT)
FREE delivery for orders over £50.00
Last RS stock
- Final 7 unit(s), ready to ship
Units | Per unit |
|---|---|
| 5 - 9 | £10.26 |
| 10 - 27 | £9.70 |
| 28 - 55 | £9.46 |
| 56 + | £9.42 |
*price indicative
- RS Stock No.:
- 262-8979P
- Mfr. Part No.:
- 7201LA12TPG
- Brand:
- Renesas Electronics
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Renesas Electronics | |
| Product Type | FIFO Memory | |
| Organisation | 512 x 9 | |
| Data Bus Width | 9bit | |
| Access Time | 12ns | |
| Mount Type | Surface | |
| Package Type | PDIP | |
| Timing Type | Asynchronous | |
| Minimum Supply Voltage | 4.5V | |
| Pin Count | 28 | |
| Maximum Supply Voltage | 5.5V | |
| Bus Direction | Bi-Directional | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Length | 34.3mm | |
| Height | 2.79mm | |
| Width | 7.62 mm | |
| Series | IDT7201LA | |
| Standards/Approvals | No | |
| Supply Current | 80mA | |
| Number of Bits per Word | 9 | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand Renesas Electronics | ||
Product Type FIFO Memory | ||
Organisation 512 x 9 | ||
Data Bus Width 9bit | ||
Access Time 12ns | ||
Mount Type Surface | ||
Package Type PDIP | ||
Timing Type Asynchronous | ||
Minimum Supply Voltage 4.5V | ||
Pin Count 28 | ||
Maximum Supply Voltage 5.5V | ||
Bus Direction Bi-Directional | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Length 34.3mm | ||
Height 2.79mm | ||
Width 7.62 mm | ||
Series IDT7201LA | ||
Standards/Approvals No | ||
Supply Current 80mA | ||
Number of Bits per Word 9 | ||
Automotive Standard No | ||
- COO (Country of Origin):
- TH
The Renesas Electronics FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a retransmit capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
Pin and functionally compatible with 720X family
Low power consumption
Ultra high speed 12ns access time
Asynchronous and simultaneous read and write
Fully expandable by both word depth and/or bit width
Auto-retransmit capability
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