The Microchip dsPIC33EP family of Digital Signal Controllers (DSCs) offer designers DSP like performance with the simplicity of an MCU. The dsPIC33EPxxGS202 range of devices are peripheral-rich DSCs designed to meet the needs of Switched Mode Power Supply (SMPS) and Digital Power Conversion applications.

These devices feature interconnected SMPS peripherals that reduce requirements placed upon the CPU, improving performance.

70 MIPS Max. CPU Speed
Code-Efficient (C and Assembly) Architecture
Two 40-Bit Wide Accumulators
Single-Cycle (MAC/MPY) with Dual Data Fetch
Single-Cycle Mixed-Sign MUL Plus Hardware Divide
32-Bit Multiply Support
Two Additional Working Register Sets (reduces context switching)
±0.9% Internal Oscillator
Programmable PLLs and Oscillator Clock Sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer (WDT)
Fast Wake-up and Start-up
Low-Power Management modes (Sleep, Idle, Doze)
Integrated Power-on Reset and Brown-out Reset
0.5 mA/MHz Dynamic Current (typical)
10 μA IPD Current (typical)
In-Circuit and In-Application Programming

High Speed 12-bit 3.25 Msps ADC Module with 3 ADC Cores
Three PWM Generators - two outputs per generator
Two Rail-to-Rail Comparators with Hysteresis
Two Programmable Gain Amplifiers (PGAs)
One UART module
One 4-Wire SPI module
One I²C module (up to 1 Mbaud) with SMBus Support