DSPIC33EP256GP504-I/PT Microchip DSPIC33EP256GP504, 16bit Digital Signal Processor 70MHz 256 kB Flash 44-Pin TQFP

View all Digital Signal Processors
Bulk discount available

Subtotal (1 pack of 2 units)*

£7.20

(exc. VAT)

£8.64

(inc. VAT)

Add to Basket
Select or type quantity
Temporarily out of stock
  • Shipping from 16 December 2025
Need more? Click ‘Check delivery dates’ to find extra stock and lead times.
Units
Per unit
Per Pack*
2 - 8£3.60£7.20
10 +£3.515£7.03

*price indicative

Packaging Options:
RS Stock No.:
177-3764
Mfr. Part No.:
DSPIC33EP256GP504-I/PT
Brand:
Microchip
Find similar products by selecting one or more attributes.
Select all

Brand

Microchip

Maximum Frequency

70MHz

Series

DSPIC33EP256GP504

Device Million Instructions per Second

70MIPS

Data Bus Width

16bit

RAM Size

32 kB

Instruction Set Architecture

Harvard

Program Memory Size

256 kB

Program Memory Type

Flash

Numeric and Arithmetic Format

ALU

Mounting Type

Surface Mount

Package Type

TQFP

Pin Count

44

Number of UART Channels

2

Number of I2C Channels

2

Minimum Operating Temperature

-40 °C

PWM Resolution

16bit

Number of CAN Channels

1

Number of SPI Channels

2

ADC Channels

9

Number of ADC Units

1

Pulse Width Modulation

3 x 16 bit

Maximum Operating Temperature

+85 °C

Number of PWM Units

3

Automotive Standard

AEC-Q100

Length

10mm

ADCs

1 (9 x 12 bit)

Dimensions

10 x 10 x 1.05mm

Timer Resolution

16 bit, 32bit

Height

1.05mm

Width

10mm

Timers

2 x 32-bit, 5 x 16-bit

ADC Resolution

12bit

Number of Timers

2

Microchip’s dsPIC33E general purpose DSC family features the highest speed 70 MIPS core with excellent performance and code density. It offers superior ADC performance, enhanced CAN communication, CTMU, Op Amps and Peripheral Trigger Generator (PTG) for high-end general purpose applications. These devices are available in various packages and with extended (125°C) temp option.

Operating Conditions
3.0V to 3.6V, -40ºC to +125ºC, DC to 60 MIPS
3.0V to 3.6V, -40ºC to +85ºC, DC to 70 MIPS
dsPIC33E Core
Modified Harvard Architecture
C Compiler Optimized Instruction Set
16-bit Wide Data Path
24-bit Wide Instructions
16x16 Integer Multiply Operations
32/16 and 16/16 Integer Divide Operations
11 Additional Instructions
Two 40-bit Accumulators with Rounding and Saturation Options

Related links