Microchip SRAM, 47L64-I/SN- 64kbit
- RS Stock No.:
- 215-5864
- Mfr. Part No.:
- 47L64-I/SN
- Brand:
- Microchip
Discontinued
- RS Stock No.:
- 215-5864
- Mfr. Part No.:
- 47L64-I/SN
- Brand:
- Microchip
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Microchip | |
| Memory Size | 64kbit | |
| Organisation | 8k x 8 bit | |
| Number of Words | 8k | |
| Number of Bits per Word | 8bit | |
| Maximum Random Access Time | 550ns | |
| Clock Frequency | 1MHz | |
| Low Power | Yes | |
| Timing Type | Synchronous | |
| Mounting Type | Surface Mount | |
| Package Type | SOIC-8 | |
| Pin Count | 8 | |
| Dimensions | 4.9 x 3.9 x 1.5mm | |
| Height | 1.5mm | |
| Maximum Operating Supply Voltage | 3.6 V | |
| Minimum Operating Temperature | -40 °C | |
| Width | 3.9mm | |
| Maximum Operating Temperature | +85 °C | |
| Length | 4.9mm | |
| Minimum Operating Supply Voltage | 2.7 V | |
| Select all | ||
|---|---|---|
Brand Microchip | ||
Memory Size 64kbit | ||
Organisation 8k x 8 bit | ||
Number of Words 8k | ||
Number of Bits per Word 8bit | ||
Maximum Random Access Time 550ns | ||
Clock Frequency 1MHz | ||
Low Power Yes | ||
Timing Type Synchronous | ||
Mounting Type Surface Mount | ||
Package Type SOIC-8 | ||
Pin Count 8 | ||
Dimensions 4.9 x 3.9 x 1.5mm | ||
Height 1.5mm | ||
Maximum Operating Supply Voltage 3.6 V | ||
Minimum Operating Temperature -40 °C | ||
Width 3.9mm | ||
Maximum Operating Temperature +85 °C | ||
Length 4.9mm | ||
Minimum Operating Supply Voltage 2.7 V | ||
The Microchip EERAM is an SRAM that doesn't lose its content on a power disruption. Inside each memory cell, transparent to the user, are non-volatile transistors that capture the SRAM content and hold it through power loss events. On power restore, the SRAM is reloaded with its last content and SRAM operation can continue.
8,192 x 8 bit Serial SRAM with internal non-volatile data backup
I2C Interface: Up to 3MHz with Schmitt trigger inputs for noise suppression
Low-Power CMOS Technology: Active current: 5 mA (maximum)
I2C Interface: Up to 3MHz with Schmitt trigger inputs for noise suppression
Low-Power CMOS Technology: Active current: 5 mA (maximum)
Standby current: 500 μA (maximum)
Hibernate current: 3 μA (maximum)
Cell-Based Non-volatile Backup mirrors SRAM array cell-for-cell and transfers all data to/from SRAM cells in parallel (all cells at same time)
Invisible-to-User Data Transfers: VCC level monitored inside device, SRAM automatically saved on power disrupt, SRAM automatically restored on VCC return
100,000 Backups Minimum (at 20°C)
100 years retention (at 20°C)
Cell-Based Non-volatile Backup mirrors SRAM array cell-for-cell and transfers all data to/from SRAM cells in parallel (all cells at same time)
Invisible-to-User Data Transfers: VCC level monitored inside device, SRAM automatically saved on power disrupt, SRAM automatically restored on VCC return
100,000 Backups Minimum (at 20°C)
100 years retention (at 20°C)
