AverLogic AL460A-7-EVB-A0, FIFO Evaluation Board for AL460A

The AL460A HD-FIFO Module is designed for evaluating the AL460A HD-FIFO integrated chip. It has two embedded AL460A-7-PBF or AL460A-13-PBF chips operating in parallel, expanding the bus width to 32-bits. Control signals and data bus signals are available on two 50-pin connectors; one connector is reserved for write controls and the input data bus; the other one is for read controls and the output data bus.
The AL460 chip is designed with a straight forward bus interface, reducing implementation and debugging efforts, and helping customers develop faster and more efficiently. This board is especially designed and optimized to be easily integrated as an add-on module on existing systems, significantly reducing interface engineering issues commonly found in retrofit efforts.

256Mbit density, 8M x 32-bit FIFO memory
Maximum 150MHz (AL460A-13-EVB-A0), 75MHz (AL460A-7-EVB-A0) 32-bit synchronous sequential read/write operations
Maximum 4.8Gbps throughput
3.3V power supply
Programmable I/O control
Supports double buffer mode (4M x32-bit upper and lower frames access)
Selectable Polarity control