Toshiba 74VHC132FT, Quad 2-Input NANDSchmitt Trigger Logic Gate, 14-Pin TSSOP

Discontinued
Packaging Options:
RS Stock No.:
171-3415P
Mfr. Part No.:
74VHC132FT
Brand:
Toshiba
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Brand

Toshiba

Logic Function

NAND

Mounting Type

Surface Mount

Number of Elements

4

Number of Inputs per Gate

2

Schmitt Trigger Input

Yes

Package Type

TSSOP

Pin Count

14

Logic Family

74VHC

Input Type

CMOS, Schmitt Trigger

Maximum Operating Supply Voltage

5.5 V

Maximum High Level Output Current

-8mA

Maximum Propagation Delay Time @ Maximum CL

19.5 ns @ 50 pF

Minimum Operating Supply Voltage

2 V

Maximum Low Level Output Current

8mA

Width

4.4mm

Minimum Operating Temperature

-40 °C

Dimensions

5 x 4.4 x 1mm

Maximum Operating Temperature

+125 °C

Output Type

CMOS, TTL

Propagation Delay Test Condition

50pF

Automotive Standard

AEC-Q100

Length

5mm

Height

1mm

The 74VHC132FT is an advanced high speed CMOS 2-INPUT SCHMITT NAND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOSlow power dissipation. Pin configuration and function are the same as the 74VHC00FT but the inputs have hysteresis and with its schmitt trigger function, the 74VHC132FT can be used as a line receivers which will receive slow input signals. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages.

Wide operating temperature: Topr = -40 to 125 
High speed: Propagation delay time = 3.8 ns (typ.) at VCC = 5.0 V
Low power dissipation: ICC = 2.0 μA (max) at Ta = 25 
High noise immunity: VNIH = VNIL = 28 % VCC (min)
Power-down protection is provided on all inputs.
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 5.5 V
Low noise: V = 0.8 V (max)