Toshiba 74VHCT00AFT, Quad 2-Input NAND Logic Gate, 14-Pin TSSOP
- RS Stock No.:
- 171-3355
- Mfr. Part No.:
- 74VHCT00AFT
- Brand:
- Toshiba
Unavailable
RS will no longer stock this product.
- RS Stock No.:
- 171-3355
- Mfr. Part No.:
- 74VHCT00AFT
- Brand:
- Toshiba
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Toshiba | |
| Logic Function | NAND | |
| Mounting Type | Surface Mount | |
| Number of Elements | 4 | |
| Number of Inputs per Gate | 2 | |
| Package Type | TSSOP | |
| Pin Count | 14 | |
| Logic Family | 74VHCT | |
| Input Type | CMOS, TTL | |
| Maximum Operating Supply Voltage | 5.5 V | |
| Maximum High Level Output Current | -8mA | |
| Maximum Propagation Delay Time @ Maximum CL | 10 ns @ 50 pF | |
| Minimum Operating Supply Voltage | 4.5 V | |
| Maximum Low Level Output Current | 8mA | |
| Automotive Standard | AEC-Q100 | |
| Height | 1mm | |
| Width | 4.4mm | |
| Minimum Operating Temperature | -40 °C | |
| Dimensions | 5 x 4.4 x 1mm | |
| Maximum Operating Temperature | +125 °C | |
| Output Type | CMOS, TTL | |
| Propagation Delay Test Condition | 50pF | |
| Length | 5mm | |
| Select all | ||
|---|---|---|
Brand Toshiba | ||
Logic Function NAND | ||
Mounting Type Surface Mount | ||
Number of Elements 4 | ||
Number of Inputs per Gate 2 | ||
Package Type TSSOP | ||
Pin Count 14 | ||
Logic Family 74VHCT | ||
Input Type CMOS, TTL | ||
Maximum Operating Supply Voltage 5.5 V | ||
Maximum High Level Output Current -8mA | ||
Maximum Propagation Delay Time @ Maximum CL 10 ns @ 50 pF | ||
Minimum Operating Supply Voltage 4.5 V | ||
Maximum Low Level Output Current 8mA | ||
Automotive Standard AEC-Q100 | ||
Height 1mm | ||
Width 4.4mm | ||
Minimum Operating Temperature -40 °C | ||
Dimensions 5 x 4.4 x 1mm | ||
Maximum Operating Temperature +125 °C | ||
Output Type CMOS, TTL | ||
Propagation Delay Test Condition 50pF | ||
Length 5mm | ||
The 74VHCT00AFT is an advanced high speed CMOS 2-INPUT NAND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The input voltage are compatible with TTL output voltage. This device may be used as a level converter for interfacing 3.3 V to 5 V system. Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, hot board insertion, etc.
Wide operating temperature range: Topr = -40 to 125
High speed: tpd = 5.0 ns (typ.) at VCC = 5.0 V
Low power dissipation: ICC = 2.0 μA (max) at Ta = 25
Compatible with TTL outputs: VIL = 0.8 V (max)
VIH = 2.0 V (min)
Power-down protection is provided on all inputs and outputs.
Balanced propagation delays: tPLH ≈ tPHL
Low noise: VOLP = 0.8 V (max)
Pin and function compatible with the 74 series (ACT/HCT/AHCT etc.) 00 type
High speed: tpd = 5.0 ns (typ.) at VCC = 5.0 V
Low power dissipation: ICC = 2.0 μA (max) at Ta = 25
Compatible with TTL outputs: VIL = 0.8 V (max)
VIH = 2.0 V (min)
Power-down protection is provided on all inputs and outputs.
Balanced propagation delays: tPLH ≈ tPHL
Low noise: VOLP = 0.8 V (max)
Pin and function compatible with the 74 series (ACT/HCT/AHCT etc.) 00 type
