Nexperia 74AHC132D-Q100J, Quad 2-Input NANDSchmitt Trigger Logic Gate, 14-Pin SOIC
- RS Stock No.:
- 153-2931
- Mfr. Part No.:
- 74AHC132D-Q100J
- Brand:
- Nexperia
Unavailable
RS will no longer stock this product.
- RS Stock No.:
- 153-2931
- Mfr. Part No.:
- 74AHC132D-Q100J
- Brand:
- Nexperia
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Nexperia | |
| Logic Function | NAND | |
| Mounting Type | Surface Mount | |
| Number of Elements | 4 | |
| Number of Inputs per Gate | 2 | |
| Schmitt Trigger Input | Yes | |
| Package Type | SOIC | |
| Pin Count | 14 | |
| Logic Family | AHC | |
| Input Type | CMOS | |
| Maximum Operating Supply Voltage | 5.5 V | |
| Maximum High Level Output Current | -8mA | |
| Maximum Propagation Delay Time @ Maximum CL | 19.5 ns @ 50 pF | |
| Minimum Operating Supply Voltage | 2 V | |
| Maximum Low Level Output Current | 8mA | |
| Dimensions | 8.75 x 4 x 1.45mm | |
| Minimum Operating Temperature | -40 °C | |
| Height | 1.45mm | |
| Width | 4mm | |
| Automotive Standard | AEC-Q100 | |
| Output Type | TTL | |
| Maximum Operating Temperature | +125 °C | |
| Length | 8.75mm | |
| Propagation Delay Test Condition | 50pF | |
| Select all | ||
|---|---|---|
Brand Nexperia | ||
Logic Function NAND | ||
Mounting Type Surface Mount | ||
Number of Elements 4 | ||
Number of Inputs per Gate 2 | ||
Schmitt Trigger Input Yes | ||
Package Type SOIC | ||
Pin Count 14 | ||
Logic Family AHC | ||
Input Type CMOS | ||
Maximum Operating Supply Voltage 5.5 V | ||
Maximum High Level Output Current -8mA | ||
Maximum Propagation Delay Time @ Maximum CL 19.5 ns @ 50 pF | ||
Minimum Operating Supply Voltage 2 V | ||
Maximum Low Level Output Current 8mA | ||
Dimensions 8.75 x 4 x 1.45mm | ||
Minimum Operating Temperature -40 °C | ||
Height 1.45mm | ||
Width 4mm | ||
Automotive Standard AEC-Q100 | ||
Output Type TTL | ||
Maximum Operating Temperature +125 °C | ||
Length 8.75mm | ||
Propagation Delay Test Condition 50pF | ||
Quad 2-input NAND Schmitt trigger, The 74AHC132-Q100, 74AHCT132-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC132-Q100, 74AHCT132-Q100 contains four 2‑input NAND gates which accept standard input signals. They can transform slowly changing input signals into sharply defined, jitter free output signals. The gate switches at different points for positive‑going and negative‑going signals. The difference between the positive voltage VT+ and the negative VT‑ is defined as the hysteresis voltage VH.
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Balanced propagation delays
Inputs accept voltages higher than VCC
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Balanced propagation delays
Inputs accept voltages higher than VCC
