Toshiba 74LCX573FT 8bit-Bit Octal D Type Latch, Transparent D Type, CMOS, 20-Pin TSSOP
- RS Stock No.:
- 171-3552P
- Mfr. Part No.:
- 74LCX573FT
- Brand:
- Toshiba
Subtotal 20 units (supplied on a continuous strip)*
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Units | Per unit |
---|---|
20 + | £0.254 |
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- RS Stock No.:
- 171-3552P
- Mfr. Part No.:
- 74LCX573FT
- Brand:
- Toshiba
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
---|---|---|
Brand | Toshiba | |
Logic Family | 74LCX | |
Latch Mode | Transparent | |
Latching Element | D Type | |
Number of Bits | 8bit | |
Number of Elements per Chip | 19 | |
Number of Channels per Chip | 8 | |
Output Type | CMOS | |
Polarity | Inverting | |
Mounting Type | Surface Mount | |
Package Type | TSSOP | |
Pin Count | 20 | |
Dimensions | 6.5 x 4.4 x 1mm | |
Height | 1mm | |
Length | 6.5mm | |
Width | 4.4mm | |
Minimum Operating Supply Voltage | 1.65 V | |
Maximum Operating Temperature | +85 °C | |
Minimum Operating Temperature | -40 °C | |
Maximum Operating Supply Voltage | 3.6 V | |
Select all | ||
---|---|---|
Brand Toshiba | ||
Logic Family 74LCX | ||
Latch Mode Transparent | ||
Latching Element D Type | ||
Number of Bits 8bit | ||
Number of Elements per Chip 19 | ||
Number of Channels per Chip 8 | ||
Output Type CMOS | ||
Polarity Inverting | ||
Mounting Type Surface Mount | ||
Package Type TSSOP | ||
Pin Count 20 | ||
Dimensions 6.5 x 4.4 x 1mm | ||
Height 1mm | ||
Length 6.5mm | ||
Width 4.4mm | ||
Minimum Operating Supply Voltage 1.65 V | ||
Maximum Operating Temperature +85 °C | ||
Minimum Operating Temperature -40 °C | ||
Maximum Operating Supply Voltage 3.6 V | ||
The 74LCX573FT is a high-performance CMOS octal D-type latch. Designed for use in 3.3-V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. The device is designed for low-voltage (3.3 V) VCC applications, but it could be used to interface to 5-V supply environment for both inputs and outputs. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input (OE).When the OE input is high, the eight outputs are in a high-impedance state. All inputs are equipped with protection circuits against static discharge.
Low-voltage operation: VCC = 1.65 to 3.6 V
High-speed operation: tpd = 8.5 ns (max) (VCC = 3.0 to 3.6 V)
Output current: |IOH|/IOL = 24 mA (min) (VCC = 3.0 V)
Power-down protection provided on all inputs and outputs
Pin and function compatible with the 74 series
(74LVC/ALVC/ etc.) 573 type
High-speed operation: tpd = 8.5 ns (max) (VCC = 3.0 to 3.6 V)
Output current: |IOH|/IOL = 24 mA (min) (VCC = 3.0 V)
Power-down protection provided on all inputs and outputs
Pin and function compatible with the 74 series
(74LVC/ALVC/ etc.) 573 type