Toshiba 74HC04D Hex CMOS Inverter, 14-Pin SOIC
- RS Stock No.:
- 171-3461P
- Mfr. Part No.:
- 74HC04D
- Brand:
- Toshiba
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Units | Per unit |
|---|---|
| 150 - 450 | £0.255 |
| 500 - 950 | £0.249 |
| 1000 + | £0.242 |
*price indicative
- RS Stock No.:
- 171-3461P
- Mfr. Part No.:
- 74HC04D
- Brand:
- Toshiba
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Toshiba | |
| Logic Function | Inverter | |
| Input Type | CMOS | |
| Output Type | Buffered | |
| Number of Elements per Chip | 6 | |
| Maximum Propagation Delay Time @ Maximum CL | 130 ns @ 50 pF | |
| Maximum High Level Output Current | -5.2mA | |
| Maximum Low Level Output Current | 5.2mA | |
| Mounting Type | Surface Mount | |
| Package Type | SOIC | |
| Pin Count | 14 | |
| Logic Family | 74HC | |
| Dimensions | 8.95 x 3.9 x 1.38mm | |
| Height | 1.38mm | |
| Maximum Operating Supply Voltage | 6 V | |
| Minimum Operating Supply Voltage | 2 V | |
| Minimum Operating Temperature | -40 °C | |
| Width | 3.9mm | |
| Maximum Operating Temperature | +125 °C | |
| Propagation Delay Test Condition | 50pF | |
| Length | 8.95mm | |
Select all | ||
|---|---|---|
Brand Toshiba | ||
Logic Function Inverter | ||
Input Type CMOS | ||
Output Type Buffered | ||
Number of Elements per Chip 6 | ||
Maximum Propagation Delay Time @ Maximum CL 130 ns @ 50 pF | ||
Maximum High Level Output Current -5.2mA | ||
Maximum Low Level Output Current 5.2mA | ||
Mounting Type Surface Mount | ||
Package Type SOIC | ||
Pin Count 14 | ||
Logic Family 74HC | ||
Dimensions 8.95 x 3.9 x 1.38mm | ||
Height 1.38mm | ||
Maximum Operating Supply Voltage 6 V | ||
Minimum Operating Supply Voltage 2 V | ||
Minimum Operating Temperature -40 °C | ||
Width 3.9mm | ||
Maximum Operating Temperature +125 °C | ||
Propagation Delay Test Condition 50pF | ||
Length 8.95mm | ||
The 74HC04D is a high speed CMOS INVERTER fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power
dissipation.
The internal circuit is composed of 3 stages, including buffered output, which provide high noise immunity
stable output. All inputs are equipped with protection circuits against static discharge or transient excess voltage.
It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power
dissipation.
The internal circuit is composed of 3 stages, including buffered output, which provide high noise immunity
stable output. All inputs are equipped with protection circuits against static discharge or transient excess voltage.
High speed: tpd = 6 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 1.0 μA (max) at Ta = 25
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V
Low power dissipation: ICC = 1.0 μA (max) at Ta = 25
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V