Infineon NOR 128Mbit CFI, SPI Flash Memory 8-Pin SOIC, S25FS128SAGMFI100
- RS Stock No.:
- 184-0086P
- Mfr. Part No.:
- S25FS128SAGMFI100
- Brand:
- Infineon
Currently unavailable
Sorry, we don't know when this will be back in stock.
- RS Stock No.:
- 184-0086P
- Mfr. Part No.:
- S25FS128SAGMFI100
- Brand:
- Infineon
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Infineon | |
| Memory Size | 128Mbit | |
| Interface Type | CFI, SPI | |
| Package Type | SOIC | |
| Pin Count | 8 | |
| Organisation | 16M x 8 bit | |
| Mounting Type | Surface Mount | |
| Cell Type | NOR | |
| Minimum Operating Supply Voltage | 1.7 V | |
| Maximum Operating Supply Voltage | 2 V | |
| Dimensions | 5.28 x 5.28 x 1.9mm | |
| Number of Bits per Word | 8bit | |
| Number of Words | 16M | |
| Minimum Operating Temperature | -40 °C | |
| Maximum Operating Temperature | +85 °C | |
Select all | ||
|---|---|---|
Brand Infineon | ||
Memory Size 128Mbit | ||
Interface Type CFI, SPI | ||
Package Type SOIC | ||
Pin Count 8 | ||
Organisation 16M x 8 bit | ||
Mounting Type Surface Mount | ||
Cell Type NOR | ||
Minimum Operating Supply Voltage 1.7 V | ||
Maximum Operating Supply Voltage 2 V | ||
Dimensions 5.28 x 5.28 x 1.9mm | ||
Number of Bits per Word 8bit | ||
Number of Words 16M | ||
Minimum Operating Temperature -40 °C | ||
Maximum Operating Temperature +85 °C | ||
- COO (Country of Origin):
- US
Density
S25FS128S-128 Mbits (16 MB)
S25FS256S-256 Mbits (32 MB)
Serial Peripheral Interface (SPI)
SPI Clock polarity and phase modes 0 and 3
Double Data Rate (DDR) option
Extended Addressing: 24- or 32-bit address options
Serial Command subset and footprint compatible with S25FL-A, S25FL-K, S25FL-P, and S25FL-S SPI families
Multi I/O Command subset and footprint compatible with S25FL-P, and S25FL-S SPI families
Read
Commands: Normal, Fast, Dual I/O, Quad I/O, DDR Quad
I/O
Modes: Burst Wrap, Continuous (XIP), QPI
Serial Flash Discoverable Parameters (SFDP) and Common Flash Interface (CFI), for configuration information
Program
256- or 512-byte Page Programming buffer
Program suspend and resume
Automatic ECC internal hardware Error Correction Code generation with single-bit error correction
Erase
Hybrid sector options
Physical set of eight 4-KB sectors and one 32-KB sector at the top or bottom of address space with all remaining sectors of 64 KB or
Physical set of eight 4-KB sectors and one 224-KB sector at the top or bottom of address space with all remaining sectors of 256 KB
Uniform sector options
Uniform 64-KB or 256-KB blocks for software
compatibility with higher density and future devices
Erase suspend and resume
Erase status evaluation
100,000 Program-Erase Cycles, minimum
20 Year Data Retention, minimum
Security Features
One-Time Program (OTP) array of 1024 bytes
Block Protection:
Status Register bits to control protection against
program or erase of a contiguous range of sectors
Hardware and software control options
Advanced Sector Protection (ASP)
Individual sector protection controlled by boot code or password
Option for password control of read access
Technology
Cypress 65 nm MirrorBit® Technology with Eclipse™
Architecture
Supply Voltage
1.7V to 2.0V
Packages (All Pb-Free)
8-lead SOIC 208 mil (SOC008) — FS128S only
WSON 6 x 5 mm (WND008) — FS128S only
WSON 6 x 8 mm (WNH008)
16-lead SOIC 300 mil (SO3016 — FS256S only)
BGA-24 6 x 8 mm
5 x 5 ball (FAB024) footprint
4 x 6 ball (FAC024) footprint
Known Good Die, and Known Tested Die
S25FS128S-128 Mbits (16 MB)
S25FS256S-256 Mbits (32 MB)
Serial Peripheral Interface (SPI)
SPI Clock polarity and phase modes 0 and 3
Double Data Rate (DDR) option
Extended Addressing: 24- or 32-bit address options
Serial Command subset and footprint compatible with S25FL-A, S25FL-K, S25FL-P, and S25FL-S SPI families
Multi I/O Command subset and footprint compatible with S25FL-P, and S25FL-S SPI families
Read
Commands: Normal, Fast, Dual I/O, Quad I/O, DDR Quad
I/O
Modes: Burst Wrap, Continuous (XIP), QPI
Serial Flash Discoverable Parameters (SFDP) and Common Flash Interface (CFI), for configuration information
Program
256- or 512-byte Page Programming buffer
Program suspend and resume
Automatic ECC internal hardware Error Correction Code generation with single-bit error correction
Erase
Hybrid sector options
Physical set of eight 4-KB sectors and one 32-KB sector at the top or bottom of address space with all remaining sectors of 64 KB or
Physical set of eight 4-KB sectors and one 224-KB sector at the top or bottom of address space with all remaining sectors of 256 KB
Uniform sector options
Uniform 64-KB or 256-KB blocks for software
compatibility with higher density and future devices
Erase suspend and resume
Erase status evaluation
100,000 Program-Erase Cycles, minimum
20 Year Data Retention, minimum
Security Features
One-Time Program (OTP) array of 1024 bytes
Block Protection:
Status Register bits to control protection against
program or erase of a contiguous range of sectors
Hardware and software control options
Advanced Sector Protection (ASP)
Individual sector protection controlled by boot code or password
Option for password control of read access
Technology
Cypress 65 nm MirrorBit® Technology with Eclipse™
Architecture
Supply Voltage
1.7V to 2.0V
Packages (All Pb-Free)
8-lead SOIC 208 mil (SOC008) — FS128S only
WSON 6 x 5 mm (WND008) — FS128S only
WSON 6 x 8 mm (WNH008)
16-lead SOIC 300 mil (SO3016 — FS256S only)
BGA-24 6 x 8 mm
5 x 5 ball (FAB024) footprint
4 x 6 ball (FAC024) footprint
Known Good Die, and Known Tested Die