Cypress Semiconductor NOR 256Mbit CFI, SPI Flash Memory 24-Pin BGA, S25FL256SAGBHIA10
- RS Stock No.:
- 181-8398P
- Mfr. Part No.:
- S25FL256SAGBHIA10
- Brand:
- Cypress Semiconductor
Discontinued
- RS Stock No.:
- 181-8398P
- Mfr. Part No.:
- S25FL256SAGBHIA10
- Brand:
- Cypress Semiconductor
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Cypress Semiconductor | |
| Memory Size | 256Mbit | |
| Interface Type | CFI, SPI | |
| Package Type | BGA | |
| Pin Count | 24 | |
| Organisation | 32M x 8 bit | |
| Mounting Type | Surface Mount | |
| Cell Type | NOR | |
| Minimum Operating Supply Voltage | 1.65 (I/O) V, 2.7 (Core) V | |
| Maximum Operating Supply Voltage | 3.6 (Core) V, 3.6 (I/O) V | |
| Dimensions | 8 x 6 x 1mm | |
| Minimum Operating Temperature | -40 °C | |
| Number of Words | 32M | |
| Maximum Operating Temperature | +85 °C | |
| Number of Bits per Word | 8bit | |
| Number of Banks | 2 | |
| Select all | ||
|---|---|---|
Brand Cypress Semiconductor | ||
Memory Size 256Mbit | ||
Interface Type CFI, SPI | ||
Package Type BGA | ||
Pin Count 24 | ||
Organisation 32M x 8 bit | ||
Mounting Type Surface Mount | ||
Cell Type NOR | ||
Minimum Operating Supply Voltage 1.65 (I/O) V, 2.7 (Core) V | ||
Maximum Operating Supply Voltage 3.6 (Core) V, 3.6 (I/O) V | ||
Dimensions 8 x 6 x 1mm | ||
Minimum Operating Temperature -40 °C | ||
Number of Words 32M | ||
Maximum Operating Temperature +85 °C | ||
Number of Bits per Word 8bit | ||
Number of Banks 2 | ||
This family of devices connect to a host system via a SPI. Traditional SPI single bit serial input and output (Single I/O or SIO) is
supported as well as optional two bit (Dual I/O or DIO) and four bit (Quad I/O or QIO) serial commands. This multiple width interface
is called SPI Multi-I/O or MIO. In addition, the FL-S family adds support for DDR read commands for SIO, DIO, and QIO that transfer
address and read data on both edges of the clock.
The Eclipse architecture features a Page Programming Buffer that allows up to 128 words (256 bytes) or 256 words (512 bytes) to be
programmed in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase
algorithms.
Executing code directly from flash memory is often called Execute-In-Place or XIP. By using FL-S devices at the higher clock rates
supported, with QIO or DDR-QIO commands, the instruction read transfer rate can match or exceed traditional parallel interface,
asynchronous, NOR flash memories while reducing signal count dramatically.
The S25FL128S and S25FL256S products offer high densities coupled with the flexibility and fast performance required by a variety
of embedded applications. They are ideal for code shadowing, XIP, and data storage.
supported as well as optional two bit (Dual I/O or DIO) and four bit (Quad I/O or QIO) serial commands. This multiple width interface
is called SPI Multi-I/O or MIO. In addition, the FL-S family adds support for DDR read commands for SIO, DIO, and QIO that transfer
address and read data on both edges of the clock.
The Eclipse architecture features a Page Programming Buffer that allows up to 128 words (256 bytes) or 256 words (512 bytes) to be
programmed in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase
algorithms.
Executing code directly from flash memory is often called Execute-In-Place or XIP. By using FL-S devices at the higher clock rates
supported, with QIO or DDR-QIO commands, the instruction read transfer rate can match or exceed traditional parallel interface,
asynchronous, NOR flash memories while reducing signal count dramatically.
The S25FL128S and S25FL256S products offer high densities coupled with the flexibility and fast performance required by a variety
of embedded applications. They are ideal for code shadowing, XIP, and data storage.