Nexperia 74HC597D,653 8-stage Surface Mount Shift Register 74HC, 16-Pin SOIC
- RS Stock No.:
- 170-8019
- Mfr. Part No.:
- 74HC597D,653
- Brand:
- Nexperia
Subtotal (1 reel of 2500 units)*
£410.00
(exc. VAT)
£492.50
(inc. VAT)
FREE delivery for orders over £50.00
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- Shipping from 01 May 2026
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Units | Per unit | Per Reel* |
|---|---|---|
| 2500 + | £0.164 | £410.00 |
*price indicative
- RS Stock No.:
- 170-8019
- Mfr. Part No.:
- 74HC597D,653
- Brand:
- Nexperia
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Nexperia | |
| Package Type | SO | |
| Logic Function | Shift Register | |
| Number of Stages | 8 | |
| Logic Family | 74HC | |
| Mounting Type | Surface Mount | |
| Operation Mode | Parallel to Serial | |
| Number of Elements | 1 | |
| Pin Count | 16 | |
| Minimum Operating Supply Voltage | 2 V | |
| Maximum Operating Supply Voltage | 6 V | |
| Dimensions | 10 x 4 x 1.45mm | |
| Minimum Operating Temperature | -40 °C | |
| Triggering Type | Positive Edge | |
| Direction Type | Uni-Directional | |
| Reset Type | Asynchronous | |
| Maximum Operating Temperature | 125 °C | |
Select all | ||
|---|---|---|
Brand Nexperia | ||
Package Type SO | ||
Logic Function Shift Register | ||
Number of Stages 8 | ||
Logic Family 74HC | ||
Mounting Type Surface Mount | ||
Operation Mode Parallel to Serial | ||
Number of Elements 1 | ||
Pin Count 16 | ||
Minimum Operating Supply Voltage 2 V | ||
Maximum Operating Supply Voltage 6 V | ||
Dimensions 10 x 4 x 1.45mm | ||
Minimum Operating Temperature -40 °C | ||
Triggering Type Positive Edge | ||
Direction Type Uni-Directional | ||
Reset Type Asynchronous | ||
Maximum Operating Temperature 125 °C | ||
The 74HC595, 74HCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input. A LOW on MR will reset the shift register. Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register.
Simple control interface
I/O expansion
Asynchronous and synchronous load options
High frequency
Cascadable
LED drivers
Key applications
Displays
Control units
I/O expansion
Asynchronous and synchronous load options
High frequency
Cascadable
LED drivers
Key applications
Displays
Control units