Nexperia 74HC165BQ,115 8-stage Surface Mount Shift Register 74HC, 16-Pin DHVQFN
- RS Stock No.:
- 170-5407P
- Mfr. Part No.:
- 74HC165BQ,115
- Brand:
- Nexperia
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- RS Stock No.:
- 170-5407P
- Mfr. Part No.:
- 74HC165BQ,115
- Brand:
- Nexperia
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
---|---|---|
Brand | Nexperia | |
Package Type | DHVQFN | |
Logic Function | Shift Register | |
Number of Stages | 8 | |
Logic Family | 74HC | |
Mounting Type | Surface Mount | |
Operation Mode | Serial, Parallel to Serial | |
Number of Elements | 1 | |
Pin Count | 16 | |
Minimum Operating Supply Voltage | 2 V | |
Maximum Operating Supply Voltage | 6 V | |
Dimensions | 3.6 x 2.6 x 0.95mm | |
Preset Type | Asynchronous | |
Maximum Operating Temperature | 125 °C | |
Reset Type | Asynchronous | |
Direction Type | Uni-Directional | |
Triggering Type | Positive Edge | |
Minimum Operating Temperature | -40 °C | |
Select all | ||
---|---|---|
Brand Nexperia | ||
Package Type DHVQFN | ||
Logic Function Shift Register | ||
Number of Stages 8 | ||
Logic Family 74HC | ||
Mounting Type Surface Mount | ||
Operation Mode Serial, Parallel to Serial | ||
Number of Elements 1 | ||
Pin Count 16 | ||
Minimum Operating Supply Voltage 2 V | ||
Maximum Operating Supply Voltage 6 V | ||
Dimensions 3.6 x 2.6 x 0.95mm | ||
Preset Type Asynchronous | ||
Maximum Operating Temperature 125 °C | ||
Reset Type Asynchronous | ||
Direction Type Uni-Directional | ||
Triggering Type Positive Edge | ||
Minimum Operating Temperature -40 °C | ||
- COO (Country of Origin):
- TH
The 74HC165: 74HCT165 are high-speed Si-gate CMOS devices. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC165: 74HCT165 are 8-bit parallel-load or serial-in shift registers with complementary serial outputs (Q7 and Q7) available from the last stage. When the parallel load (PL) input is LOW, parallel data from the D0 to D7 inputs are loaded into the register asynchronously. When PL is HIGH, data enters the register serially at the DS input and shifts one place to the right (Q0 → Q1 → Q2, etc.) with each positive-going clock transition. This feature allows parallel-to-serial converter expansion by tying the Q7 output to the DS input of the succeeding stage.
Simple control interface
I/O expansion
Asynchronous and synchronous load options
High frequency
Cascadable
LED drivers
Key applications
Displays
Control units
I/O expansion
Asynchronous and synchronous load options
High frequency
Cascadable
LED drivers
Key applications
Displays
Control units
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