Cypress Semiconductor S25FL256SAGBHBA00, SPI NOR 256Mbit Flash Memory Chip, 16-Pin SOIC

Technical Reference
Legislation and Compliance
RoHS Certificate of Compliance
COO (Country of Origin): US
Product Details

This family of devices connect to a host system via a SPI. Traditional SPI single bit serial input and output (Single I/O or SIO) is
supported as well as optional two bit (Dual I/O or DIO) and four bit (Quad I/O or QIO) serial commands. This multiple width interface
is called SPI Multi-I/O or MIO. In addition, the FL-S family adds support for DDR read commands for SIO, DIO, and QIO that transfer
address and read data on both edges of the clock.
The Eclipse architecture features a Page Programming Buffer that allows up to 128 words (256 bytes) or 256 words (512 bytes) to be
programmed in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase
algorithms.
Executing code directly from flash memory is often called Execute-In-Place or XIP. By using FL-S devices at the higher clock rates
supported, with QIO or DDR-QIO commands, the instruction read transfer rate can match or exceed traditional parallel interface,
asynchronous, NOR flash memories while reducing signal count dramatically.
The S25FL128S and S25FL256S products offer high densities coupled with the flexibility and fast performance required by a variety
of embedded applications. They are ideal for code shadowing, XIP, and data storage.

Specifications
Attribute Value
Memory Size 256Mbit
Interface Type SPI
Package Type SOIC
Pin Count 16
Organisation 32M x 8 bit
Mounting Type Surface Mount
Cell Type NOR
Minimum Operating Supply Voltage 2.7 V
Maximum Operating Supply Voltage 3.6 V
Length 10.3mm
Height 2.55mm
Width 7.5mm
Dimensions 10.3 x 7.5 x 2.55mm
Number of Words 32M
Minimum Operating Temperature -40 °C
Automotive Standard AEC-Q100
Number of Bits per Word 8bit
Maximum Operating Temperature +85 °C
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