Microchip KSZ8851-16MLLI, Ethernet Controller, 100Mbps 100BaseTX, 10BaseT, BIU, 3.3 V, 48-Pin LQFP
- RS Stock No.:
- 177-3997
- Mfr. Part No.:
- KSZ8851-16MLLI
- Brand:
- Microchip
Available to back order for despatch when stock is available
Added
Price Each (In a Pack of 2)
£5.20
(exc. VAT)
£6.24
(inc. VAT)
| Units | Per unit | Per Pack* |
| 2 + | £5.20 | £10.40 |
| *price indicative | ||
- RS Stock No.:
- 177-3997
- Mfr. Part No.:
- KSZ8851-16MLLI
- Brand:
- Microchip
Technical Reference
Legislation and Compliance
- COO (Country of Origin):
- US
Product Details
The KSZ8851 is a single-port controller chip with a SPI or 8-/16-/32-bit non-PCI CPU interface. Available in 32-/48-/128-pin packages, the KSZ8851 is for applications requiring cost-effective, high-throughput Ethernet connectivity in traditional embedded systems with MCUs or MPUs.
Integrated MAC and PHY Ethernet Controller
Designed for high performance and high throughput applications
Supports 10BASE-T/100BASE-TX
Supports full-duplex flow control and half-duplex back pressure collision flow control
Supports DMA-slave burst data read and write transfers
Supports IP Header (IPv4)/TCP/UDP/ICMP checksum generation and checking
Supports IPv6 TCP/UDP/ICMP checksum generation and checking
Automatic 32-bit CRC generation and checking
Simple SRAM-like host interface easily connects to most common embedded MCUs.
Supports multiple data frames for transmit and receive without address bus and byte-enable signals
Supports both Big- and Little-Endian processors
Designed for high performance and high throughput applications
Supports 10BASE-T/100BASE-TX
Supports full-duplex flow control and half-duplex back pressure collision flow control
Supports DMA-slave burst data read and write transfers
Supports IP Header (IPv4)/TCP/UDP/ICMP checksum generation and checking
Supports IPv6 TCP/UDP/ICMP checksum generation and checking
Automatic 32-bit CRC generation and checking
Simple SRAM-like host interface easily connects to most common embedded MCUs.
Supports multiple data frames for transmit and receive without address bus and byte-enable signals
Supports both Big- and Little-Endian processors
Specifications
Attribute | Value |
|---|---|
| Physical Network Type | 100BaseTX, 10BaseT |
| Host Interface | BIU |
| IC Type | Controller IC |
| Network Interface | 100BaseTX, 10BaseT |
| Communication Mode | Full Duplex, Half Duplex |
| Data Rate | 100Mbps |
| Loopback Mode | Internal |
| Standard Supported | IEEE 802.3u, IEEE 802.3x |
| Mounting Type | Surface Mount |
| Package Type | LQFP |
| Pin Count | 48 |
| Auto-Negotiation | Yes |
| DMA Support | Yes |
| Typical Operating Supply Voltage | 3.3 V |
| Dimensions | 7.1 x 7.1 x 1.45mm |
| Minimum Operating Temperature | -40 °C |
| Maximum Operating Temperature | +85 °C |
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