USB Audio 2.0 Multichannel Ref.Design

USB Audio 2.0 Reference Design

USB Audio Class 2.0 provides a dramatic improvement over USB Audio Class 1.0 with the addition of 24bit audio, sample frequencies up to 192kHz and the ability to scale to large numbers of input/output channels.,XMOS has developed a USB Audio Class 2.0 software framework design to work on XS1-L devices. The design provides certified USB 2.0 High Speed device and Audio Class 2.0 device class implementations with configurable digital audio interfaces, peripherals and the ability to integrate audio processing. The framework also includes support for USB Audio Class 1.0.

500 MIPS, 8 threads, XS1-L1 processor
Streams bit perfect audio data up to 24-bit @ 192kHz
Supports standard sample rates: 44.1kHz, 48kHz, 88.2kHz, 96kHz and 192kHz
USB endpoints use the asynchronous synchronization mode to allow an external low jitter audio master clock to be used
Optical digital audio output (S/PDIF)
Stereo line-level audio input and output
XMOS XSYS debug header for easy programming/debug from the host using the XMOS XTAG2 debug adapter
USB bus-powered

XCore Processors

The XCore is a multithreaded processing component with instruction set support for communication, input-output and timing. Thread execution is deterministic and the time taken to execute a sequence of instructions can be accurately predicted. This makes it possible for software executing on an XCore to perform many functions normally performed by hardware, especially DSP and I/O.,Each XCore thread has a dedicated set of registers and scheduling of threads is performed by hardware. Communication between threads is performed using hardware channels. Communication instructions transfer data directly between processor registers and channels, automatically scheduling and descheduling the communicating threads to control the flow of data.,The XCore has an efficient set of instructions to support conventional sequential programming languages. Its multithreading, communication and input-output instructions are designed to support modern concurrent programming languages. The instruction set is easily extensible to provide applications-specific instructions; these currently include support for long-arithmetic, CRC, DSP and cryptography.,Each XCore has a single unified memory system which is shared for program and data by all of the threads executed by the core. Multiple threads can share the same program in memory and can pass ownership of data between them. No caches are used.,The XCore has a tightly integrated set of I/O ports controlled directly by instructions. Data is transferred directly between processor registers and ports, avoiding the use of memory and minimizing latency. The ports can serialize and deserialize data enabling the processor to handle high speed data streams. They can also timestamp data arrival, and accurately control the time at which data is transferred to or from the pins.